1. Field of the Invention
The present invention relates to an M-ary-modulation-capable equalizing processing apparatus, received signal processing system, receiver and M-ary-modulation-capable equalizing processing method, and more particularly, to an M-ary-modulation-capable equalizing processing apparatus for use in digital radio communication techniques to support fading, received signal processing system including the M-ary-modulation-capable equalizing processing apparatus, receiver including the received signal processing system, and M-ary-modulation-capable equalizing processing method to achieve aforementioned apparatuses and system.
2. Description of Related Art
Generally, on radio channels a receiver receives at the same time radio signals propagated through a plurality of paths with different propagation time due to effects of multipath fading. Therefore, on the receiver, delay distortion occurs and bit error rate characteristic deteriorate.
As the symbol rate is increased, the delay distortion becomes larger. Accordingly, in future high-rate digital mobile communication apparatuses, effects of delay distortion are not ignored, and it is dispensable removing the delay distortion.
An equalizer is representative means for correcting the delay distortion. In the radio communication field, an equalizer is mounted on a receiver that performs high-rate transmission. Further, there is a growing trend to mount an equalizer on mobile phones and the like that adopt GSM (Global System for Mobile communication) that is one of European digital mobile telephone standards.
A representative algorithm as an equalizer is a Viterbi equalizing algorithm. The Viterbi equalizing algorithm is one for generating a received signal replica from combinations of all expected received signals using detection results of delay distortion of multipath fading, and estimating a most likely transmitted signal from the Euclidean distance between the replica and received signal.
A processing amount of the Viterbi equalizing algorithm is affected by “2at” when assumed that allowed delay time on multipath fading is t[s] (t=k×T, where T is a symbol duration, and k is the number of allowable delay taps) and an information amount per symbol is a bits. This is because of increases in the number of states in trellis state transition and the number of possible transitions from state “1” used in the Viterbi equalizing algorithm, and the processing amount exponentially increases with increases in information amount a per symbol.
For example, in EDGE (Enhanced Data GSM Environment) that is the GSM next-generation communication standard, the information amount per symbol is “3” (the information amount a is “1” in GSM), and when the number of allowable delay taps (k) is “5”, required are the number of states of “4096” and the number of possible transitions of “8”. The number of states in EDGE is 256 times that in GSM, and the number of possible transitions in EDGE is 3 times that in GSM.
Document 1 (Japanese Laid-Open Patent Publication H05-335893) discloses an equalizing method and apparatus which define a plurality of states as one state set in the Viterbi equalizing algorithm, applying the Viterbi equalizing algorithm to such a limited state of the state set, and thereby suppressing the processing amount of the Viterbi equalizing amount.
However, in the equalizing method and apparatus as disclosed in Patent Document 1, considered are transitions for each state set and transitions between limited states in the Viterbi equalizing algorithm, and consideration is not given to deterioration of bit error rate characteristics.